1. Field of the Invention
The present invention relates to a method for stack die placement, and more particularly to a method for wafer level stack die placement.
2. Description of the Related Art
In a multi-chip package, a plurality of dice may be stacked on a die carrier to achieve a package of high density. A conventional stacking way is picking and placing the individual die, which has a low efficiency in the stack die placement. Furthermore, the electrical connection for stacking dice is provided by flip-chip bonding or wire bonding. When a wire bond die is stacked on a flip-chip die, an adhesive will be formed on a non-active surface of the flip-chip die in advance to facilitate the adhesive fixation of the wire bond die which is stacked above.
The conventional method for stack die placement is to cut a wafer into a plurality of dice firstly, and then pick and place them individually, one by one, to perform the stack die placement. Referring to FIG. 1A, a wafer 110 comprising a plurality of dice 111 is provided at first. Referring to FIG. 1B, the wafer 110 is adhered to a cutting tape 120, on which the wafer 110 is cut to form the dice 111 in the form of a wire bond. Referring to FIG. 1C, a plurality of flip-chip dice 130 are provided subsequently, which are bonded to a substrate 140 to serve as a die carrier when stacking the dice 111. Then, a thermoset adhesive 150 is formed on a non-active surface 131 of the flip-chip dice 130. Referring to FIG. 1D, then the substrate 140 is transported into a pick & place machine together with the flip-chip dice 130, and a pick & place arm (not shown) is moved to pick up the active surface 112 of the dice 111, wherein the dice 111 are placed on the corresponding flip-chip dice 130 in a back-to-back way individually. Referring to FIG. 1E, the thermoset adhesive 150 is heated to adhere the non-active surfaces 113 of the dice 111 and the non-active surfaces 131 of the flip-chip dice 130. In the conventional method for stack die placement, the dice are picked and placed on the flip-chip dice 130 one by one by the pick & place arm after the wafer 110 is cut, so that the conventional method for stack die placement is time consuming and its stacking efficiency is rather low.
A similar method for stack die placement is disclosed in ROC (Taiwan) Patent Publication No. 444364 entitled “Method for Manufacturing Stacked Chip Package Structure”, which comprises a die-attaching process on the dice, wherein the back of a second chip is adhered on a first chip by an adhesive layer, and then an underfill is formed between the first chip and the substrate. Therefore, in the method for manufacturing the stacked chip package structure described above, individual stacking should be carried out on the singulated chip. When the stack-type multi-chip package structures are mass-produced, the second chips only can be stacked to the backs of the first chip by picking and placing one by one.
Consequently, there is an existing need for a method for wafer level stack die placement to solve the above-mentioned problems.